Single anneal step process for forming titanium silicide on semiconductor wafer

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United States of America Patent

PATENT NO 5043300
SERIAL NO

07510340

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Abstract

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An improved process is disclosed for forming a conductive layer of titanium silicide on a silicon semiconductor wafer using a single annealing step which comprises the steps of forming a titanium layer over the wafer in a vacuum deposition chamber in the substantial absence of oxygen-bearing gases; transferring the titanium coated wafer to a sealed annealing chamber without substantially exposing the newly formed titanium layer to oxygen-bearing gases; and then annealing the titanium-coated silicon semiconductor wafer in a nitrogen-bearing atmosphere in the sealed annealing chamber at a first temperature of from about 500.degree. C. to about 695.degree. C., in the substantial absence of oxygen-bearing gases, to form a titanium silicide layer and a titanium nitride layer over the titanium silicide which inhibits migration of underlying silicon to the surface, and to react substantially all of the titanium overlying silicon oxide (SiO.sub.2) regions of the wafer to form titanium nitride, and then raising the temperature to form a more stable phase of titanium silicide without risk of reaction between the silicon oxide and unreacted titanium thereon.

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Patent Owner(s)

Patent OwnerAddress
APPLIED MATERIALS INC A CORP OF DELAWARE3050 BOWERS AVENUE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nulman, Jaim Palo Alto, CA 53 2165

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