Wiring design for semiconductor integrated circuit
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United States of America Patent
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-
Sep 3, 1991
Grant Date -
N/A
app pub date -
Dec 21, 1988
filing date -
Dec 23, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method of designing semiconductor integrated circuits wherein rough routes are designated after a process of design for cells layout is completed, then wirings between cells are supposed automatically on the basis of the designated rough routes, investigation of the characteristic of the wirings is executed, and after a target characteristic is attained, a wiring pattern satisfying all of required electrical and physical conditions, including layout rules, i.e. a detailed wiring pattern, is prepared.
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