PNP type lateral transistor with minimal substrate operation interference

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5047828
SERIAL NO

07066663

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Abstract

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The invention provides a unique sub-micron dimensioned PNP-type transistor wherein hundreds of such transistors may be fabricated on a single chip with each transistor comprising an active region surrounded by field oxide completely isolating it from the substrate and its effects on operation. Slots made in the substrate permit angle evaporation of etch-resist to protect the active region while it is disconnected form the substrate by etching therebeneath via the slots. Substrate oxidation supports the active regions while orthogonal slots are provided permitting access to opposed sides of the active regions for doping N+ which is driven in from one side only while P or P+ is introduced and driven in from both sides, thereby providing a P+ N+N, P+ emitter, base, collector transistor active region to which electrical connections are applied using conventional techniques, providing almost complete reduction of the parasitic capacitances and resistances because of the total oxide isolation of the active regions from the substrate.

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Patent Owner(s)

Patent OwnerAddress
NEWPORT FAB LLC DBA JAZZ SEMICONDUCTOR4321 JAMBOREE ROAD NEWPORT BEACH CA 92660

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Soclof, Sidney I San Gabriel, CA 25 455

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