Dual mode adder circuitry with overflow detection and substitution enabled for a particular mode
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United States of America Patent
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-
Sep 10, 1991
Grant Date -
N/A
app pub date -
Nov 16, 1987
filing date -
Nov 16, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A video signal processor includes circuitry which may be conditioned by a mode control signal to operate as a single 16-bit adder or as two eight-bit adders. The circuitry includes two eight-bit adders, each of which has a carry-in input terminal and a carry-out output terminal. The carry-out output terminal of one of the adders is selectively coupled, via an AND gate, to the carry-in input terminal of the other adder. The AND gate is controlled by the mode control signal. In the mode where the circuitry operates as two eight-bit adders, additional circuitry is included to detect output values which may exceed the zero to 255 range of valid values and to saturate these invalid values either at zero or 255.
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