Digital signal receiving circuit with means for controlling a baud rate sampling phase by a power of sampled signals
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United States of America Patent
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Sep 10, 1991
Grant Date -
N/A
app pub date -
Nov 16, 1988
filing date -
Nov 16, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
In a baude rate sampling type receiving circuit for use in a system for transmitting digital data signal at a transmission baude rate, in order to control the sampling phase at the optimum phase, desired elements of an autocorrelation function of a series of baud rate sampled signals are calculated and are linearly summed by a calculating circuit to provide a linear summation as a power of the series of sampled signals. The sampling phase at the baud rate sampling is controlled by a control circuit by use of the linear summation so that the power is maximized, whereby the sampling phase is maintained at the optimum sampling phase.
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