Multi-layer semiconductor device

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United States of America Patent

PATENT NO 5051865
SERIAL NO

07667257

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Abstract

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A multi-layer semiconductor device which includes a stacked wafer body having a plurality of sets of two semiconductor wafers and a heat sink plate interposed therebetween. An end of the heat sink plate of each set of wafers is exposed at at least one of the side surfaces of the stacked wafer body. An intermediate connecting circuit is provided for connecting circuits in each of the sets of two semiconductors wafers, the intermediate connecting circuit is provided on at least one side surface other than the surface at which the ends of the heat sink plate are exposed.

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Patent Owner(s)

Patent OwnerAddress
FUJITSU LIMITEDKAWASAKI

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kato, Takashi Sagamihara, JP 514 6728

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