Program/erase selection for flash memory

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United States of America Patent

PATENT NO 5053990
SERIAL NO

07157361

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Abstract

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A semiconductor flash EPROM/EEPROM device which includes a command port for receiving instruction on a data line and providing control signals to a memory for providing program and erase functions, a method to program and erase the memory. A program sequence is comprised of setting up a program command during a first write cycle, preforming a second write cycle to load address to address register and data to to a data register, programming during a program cycle and writing a program verify command during a third write cycle to verify the programmed data during a read cycle. An erase sequence is comprised of writing a setup erase command during a first write cycle, an erase command during a second write cycle providing the erasure during an erase cycle, writing the erase verify command during a third write cycle which also addresses the address of the memory and providing erase verification during a read cycle. Both the erase and program cycles provide for measured incremental erasing and programming.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baker, Alan Fair Oaks, CA 14 483
Hoekstra, George Santa Clara, CA 7 620
Kreifels, Jerry A Citrus Heights, CA 13 687
Kynett, Virgil N El Dorado Hills, CA 16 1121
Wells, Steven Orangevale, CA 45 1661
Winston, Mark El Dorado Hills, CA 5 785

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