Method of forming a plurality of solder connections

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United States of America Patent

PATENT NO 5056216
SERIAL NO

07470622

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Abstract

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A solder interconnection for forming vias between first and second substrates comprises a plurality of solder containing wells extending into a flat surface of the first substrate, the solder in each well being soldered to one of a corresponding plurality of conductor posts extending outwardly from a flat surface of the second substrate. The plurality of the wells are created in a pattern, an aliquot of solder is deposited in each well, with the aliquots being of substantially no greater volume than that of the well it occupies, the posts are provided in aligned array with the pattern, the solder is melted, the posts are inserted and the solder solidifies. Very closely placed vias can be formed.

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Patent Owner(s)

Patent OwnerAddress
COMMTECH INTERNATIONAL545 MIDDLEFIELD ROAD STE 180 MENLO PARK CA 94025

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gaisford, Scott Hundvag, NO 6 182
Madou, Marc J Palo Alto, CA 36 2786

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