Integrating-phase lock method and circuit for synchronizing overlay displays on cathode-ray-tube monitors of digital graphic information and video image information and the like
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United States of America Patent
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Oct 22, 1991
Grant Date -
N/A
app pub date -
Feb 21, 1989
filing date -
Feb 21, 1989
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A novel separate synchronizing error signal integrating filter section and error signal phase lock loop section independently controllable for such purposes as controlling the horizontal synchronization of overlayed video and graphic display rasters, particularly during periods of aberrant operation.
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