Semiconductor device having a metal silicide layer connecting two semiconductors

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United States of America Patent

PATENT NO 5061983
SERIAL NO

07318411

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Abstract

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A method for manufacturing a semiconductor device that includes p- and n-type regions formed on an insulating substrate, and an interconnection layer electrically coupled with these p- and n-type regions. The interconnection layer is an n-type polycrystalline silicon layer which is electrically coupled with the p- and n-type regions through a metal silicide film formed between the interconnection layer and the p- and n-type regions.

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Patent Owner(s)

Patent OwnerAddress
TOKYO SHIBAURA DENKI KABUSHIKI KAISHA72 HORIKAWA-CHO SAIWAI-KU KAWASAKI-SHI KANAGAWA-KEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Egawa, Hideharu Tokyo, JP 12 101
Maeguchi, Kenji Yokohama, JP 8 212
Nishi, Yoshio Yokohama, JP 36 859

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