Method and apparatus for employing a buffer memory to allow low resolution video data to be simultaneously displayed in window fashion with high resolution video data
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United States of America Patent
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Nov 12, 1991
Grant Date -
N/A
app pub date -
Dec 3, 1987
filing date -
Dec 17, 1986
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A low resolution to high resolution display system arranged such that a low resolution video signal from a personal computer is written in a memory plane in response to an address based on a clock signal produced from the personal computer side, a switching circuit is provided in a video signal path of a high resolution display apparatus for switching between the memory plane and the video signal produced by the high resolution display apparatus and the memory plane is read by an address based on the clock signal of the display apparatus produced during a display window period, whereby the video signal read from the memory plane is supplied through the switching circuit to the video signal path of the display apparatus.
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