Semiconductor device having leads for mounting to a surface of a printed circuit board

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5067007
SERIAL NO

07645357

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Abstract

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Attempts have been made to increase the number of pins of packages accompanying the trend toward fabricating integrated circuits highly densely and in smaller sizes. The present invention provides technology for improving reliability in fabricating packages of the surface-mounted type that have increased number of pins. That is, when the packages are mounted on the wiring substrate, the lead pins that receive load from the axial direction exhibit bending strength which is smaller than the junction strength of solder at the junction portions. To achieve this object, the lead pins are made of a material having large resiliency such as a fiber-reinforced material, a transformation pseudo elastic material, an ultra-high tension material, or a heat-resistant ultra-high tension material.

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Patent Owner(s)

Patent OwnerAddress
HITACH LTD6-6 MARUNOUCHI 1-CHOME CHIYODA-KU TOKYO
HITACHI VLSI ENGINEERING CORP5-20-1 JOSUIHON-CHO KODAIRA-SHI TOKYO

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kato, Masao Hadano, JP 230 4194
Kawashima, Masayuki Higashimurayama, JP 13 407
Kubo, Kazutoshi Akishima, JP 4 296
Kumagai, Takashi Isehara, JP 149 2091
Kuroda, Shigeo Ohme, JP 17 412
Miyamoto, Seiji Fuchuu, JP 25 527
Okinaga, Takayuki Akishima, JP 24 614
Otsuka, Kanji Higashiyamato, JP 72 2721
Sahara, Kunizo Nishitama, JP 6 570
Shirai, Yuuji Kodaira, JP 5 373
Tachi, Hiroshi Akishima, JP 11 369
Usami, Mitsuo Ohme, JP 81 2001
Yamada, Takeo Koganei, JP 95 1432

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