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Abstract

A radiation hardened or fail safe circuit is coupled between a peripheral data storage device, for example a disk drive, and its associated controller. The circuit includes an AND logic gate with two inputs: a write enable signal from the controller; and a sensing input logic signal normally high, but driven low responsive to the sensing of unacceptably high levels of radiation. A delay means is interposed between the controller and the AND gate, for delaying propagation of the write enable signal a sufficient amount of time to ensure that the sensing input to the AND gate responds to the detection of high radiation before the arrival of the write enable signal. The delay means can be an LC delay circuit, a coaxial cable, or a series of latches clocked in alternation order by opposite phases of an oscillator.

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