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Abstract

This invention provides an in situ monitoring technique and apparatus for chemical/mechanical planarization end point detection in the process of fabricating semiconductor or optical devices. Fabrication of semiconductor or optical devices often requires smooth planar surfaces, either on the surface of a wafer being processed or at some intermediate stage e.g. a surface of an interleaved layer. The detection in the present invention is accomplished by means of capacitively measuring the thickness of a dielectric layer on a conductive substrate. The measurement involves the dielectric layer, a flat electrode structure and a liquid interfacing the article and the electrode structure. Polishing slurry acts as the interfacing liquid. The electrode structure includes a measuring electrode, an insulator surrounding the measuring electrode, a guard electrode and another insulator surrounding the guard electrode. In the measurement a drive voltage is supplied to the measuring electrode, and in a bootstrap arrangement to a surrounding guard electrode, thereby measuring the capacitance of the dielectric layer of interest without interferring effect from shunt leakage resistance. The process and apparatus are useful not only for measuring the thickness of dielectric layers on conductive substrates in situ, during planarizing polishing, but also for measuring the dielectric thickness on substrates in other processes, e.g. measuring the dielectric layer thickness prior to or after an etching process.

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First Claim