Testability architecture and techniques for programmable interconnect architecture

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United States of America Patent

PATENT NO 5083083
SERIAL NO

07375799

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In a user-configurable integrated circuit including a plurality of uncommitted conductors which may be programmably connected to one another and to functional circuit blocks by a user to form electronic circuits, apparatus for testing for defects in the form of breaks in the electrical continuity of individual ones of the conductors prior to formation of the electronic circuits by a user, including circuitry responsive to external signals for temporarily connecting together selected ones of the uncommitted conductors to form a series circuit having a first end conductor and a second end conductor, circuitry for placing an electrical charge on the first end conductor such that a selected dynamic voltage is placed on the first end conductor, circuitry for driving the second end conductor to a voltage different from the selected dynamic voltage, circuitry for sensing the voltage on the first end conductor at a predetermined time after the driving voltage has been removed, circuitry for storing a signal related to the sensed voltage on the first end conductor, and circuitry for communicating the signal to an input/output pad of the integrated circuit.

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Patent Owner(s)

Patent OwnerAddress
ACTEL CORPORATION A CA CORP955 E ARQUES AVE SUNNYVALE CA 94086

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Jia-Hwang Cupertino, CA 18 581
El-Ayat, Khaled A Cupertino, CA 22 1977

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