Thin film transistor panel and manufacturing method thereof

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United States of America Patent

PATENT NO 5084905
SERIAL NO

07415889

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Abstract

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A thin film transistor panel has a substrate on which a plurality of electrode lines are aligned in a matrix form, thin film transistors which are formed on crossing portions of the plurality of the electrode lines, a diffusible insulating film for covering said thin film transistors, and metal-diffused layers and are connected to source electrodes. The metal-diffused layers are formed by diffusing a metal into predetermined areas of said insulating film. If the metal-diffused layers are used as the pixel electrodes, high density display can be obtained due to the fine pixel electrodes. In addition, a manufacturing method of thin film transistor panel having the steps of forming gate electrode on a substrate, forming gate insulating films on the gate electrodes, forming semiconductor layers on said gate insulating films, forming source and drain electrodes on said semiconductor layers except for channel portions, forming a diffusible insulating film which covers the whole surface of the substrate, providing contact holes in said insulating film corresponding to said source electrodes, and forming metal-diffused layers by diffusing a metal into the insulating film and inner surfaces of said contact holes. The metal-diffused areas can be formed in high pattern accuracy, and the fine pixel electrodes can be easily obtained if the metal-diffused areas are used as the pixel electrodes.

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Patent Owner(s)

Patent OwnerAddress
CASIO COMPUTER CO LTD6-2 HON-MACHI 1-CHOME SHIBUYA-KU TOKYO 151-8543

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mori, Hisatoshi Fussa, JP 12 898
Sasaki, Makoto Tokyo, JP 458 4514
Sato, Syunichi Kawagoe, JP 13 1806

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