Selectively programmable interconnections in multilayer integrated circuits
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United States of America Patent
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Feb 11, 1992
Issued Date -
N/A
app pub date -
Jun 26, 1989
filing date -
Jun 12, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method of fabricating programmable interlayer conductive links in a multilayer integrated circuit structure, comprising the steps of forming elements of either a conductive or semiconductive material as a lower layer, depositing an insulative layer on top of the lower layer elements, implanting ions into one or more link regions of the insulative layer, forming at least one upper conductor over the implanted regions and selectively applying sufficient energy to at least one of the implanted regions of the integrated circuit structure to render the selected link region conductive. The invention also embraces customized integrated circuit structures with interlayer conductive paths made in accordance with this method.
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