Method for fabricating a semiconductor device by slope etching a polysiliow layer
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United States of America Patent
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Feb 18, 1992
Issued Date -
N/A
app pub date -
May 2, 1990
filing date -
Sep 21, 1987
priority date (Note) -
Expired
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Abstract
This invention provides a method for manufacturing a semiconductor device which prevents residues from remaining around an etching pattern of a poly-silicon by making the poly-silicon be gradiently etched out. An oxide barrier layer is deposited over a poly-silicon layer, and impurities are implanted through the oxide barrier layer, wherein the concentration difference of impurities makes the poly-silicon have a graded sidewalls, and the value of resistance is controlled by the quantity of impurities. After removing the oxide barrier layer the poly-silicon is selectively etched into a poly electrode having a graded sidewall. The thermal treatment of the poly electrode is carried out and a polysilicon for another electrode is deposited and etched out.
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