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Abstract

The disclosed asynchronous transfer mode (ATM) switching network evenly scatters individual cells of an ATM data stream in the first half of the network and routes them to their intended destination in the second half of the network. The network is constructed from interchangeable switching modules each preferably containing only two stages of switching elements, with each switching element having a common memory, thus reducing the component count by one third compared to Clos' 3-stage non-blocking modules. Each individual module provides a switched path from any selected one of its module inputs to any selected one of its module outputs, with the common memory acting as a buffer until a path becomes available to the desired module output. Since the additional stages between the module's input stage and the module's output stage typically used to provide a non-blocking module are dispensed with, not only the component count, but also the transmission delay through the switching network may be reduced.

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First Claim