Manufacturing method for a multilayer printed circuit board

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United States of America Patent

PATENT NO 5092032
SERIAL NO

07700736

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Disclosed is a method for manufacturing a multilayer circuit board in which landless inter-layer connection is made between a lower-layer electric circuit and an upper-layer electric circuit formed on a substrate. The method of the invention utilizes a single photoresist to form a circuitization layer and the conductive via extending upwardly from it. In the method of the invention a metal layer is applied to the substrate, and photoresist is applied to the metal layer. The photoresist is then exposed and developed to define a resist hole. A via bump is formed in the resist hole. The residual resist is then imaged to form a first circuit pattern in the underlying metal layer. The remaining photoresist is removed from the first metal layer, and an organic dielectric layer is formed on the etched metal layer, the exposed substrate, and via bump. The organic dielectric layer is then flattened or otherwise processed to expose the surface of the via bump. Either a second metal layer or an electronic part is deposited or applied to the exposed top surface of the via bump as an upper-layer electric circuit element.

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Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPORATIONNEW ORCHARD ROAD ARMONK NY 10504

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Murakami, Takahiro Kusatsu, JP 58 497

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