Internally decoupled integrated circuit package

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United States of America Patent

PATENT NO 5095402
SERIAL NO

07591778

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Abstract

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A decoupling scheme is presented which is well suited for use with any type of integrated circuit package. In accordance with the present invention, a flat decoupling capacitor is attached directly to the top of an IC die and is electrically connected to the IC by means of raised conductive bumps provided either on the surface of the decoupling capacitor or on the IC die surface. These conductive bumps interconnect the internal electrodes of the capacitor to the power and ground circuits of the IC. The resulting decoupling scheme provides a decoupling loop with an inductance which is significantly lower than previously disclosed decoupling loops.

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Patent Owner(s)

Patent OwnerAddress
CIRCUIT COMPONENTS INCORPORATED2400 SOUTH ROOSEVELT STREET TEMPE AS 85282

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hernandez, Jorge M Mesa, AZ 29 1123
Hyslop, Michael S Chandler, AZ 4 301

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