Computer address modification system using writable mapping and page stores
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United States of America Patent
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-
Mar 31, 1992
Issued Date -
N/A
app pub date -
Jan 23, 1989
filing date -
Aug 10, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A computer system includes a computer address modification system that is advantageously coupled in a bus network to selectively translate memory address data in 16K blocks and provide DMA addresses which may match the 16 K memory address blocks. The modification system includes a mapping RAM selectively providing translated addresses to enable addresses in a 16 megabyte extended address space. The modification system also includes a page register storing for each addressable 16K block of data for each DMA channel a page address within the extended address space.
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