Contact metallization of semiconductor integrated-circuit devices

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United States of America Patent

PATENT NO 5102827
SERIAL NO

07732947

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Abstract

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In the manufacture of semiconductor integrated-circuit devices, electrical contact to semiconductor regions such as, e.g., source and drain regions of field-effect transistors typically is made by a structure in which a silicide is intermediary to silicon and metal. The invention provides for processing, after window formation and before metal deposition, which includes deposition of a silicide-forming material, and annealing in a non-oxidizing atmosphere. Preferably, the atmosphere includes a component which forms a conductive compound with the silicide-forming material. Resulting contact structures have good step coverage, low contact resistance, low interdiffusion of metal into semiconductor, and fail-safe operation in the event of breaks due to electromigration. Moreover, in the case of misalignment of a window, a contact region may be extended laterally by dopant diffusion, thereby safeguarding the junction. Tolerance to window misalignment permits increased packing density, e.g., in dynamic random-access memory arrays.

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Patent Owner(s)

Patent OwnerAddress
AGERE SYSTEMS INC1110 AMERICAN PARKWAY N E ALLENTOWN PA 18109

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Min-Liang Wescosville, PA 35 723
Leung, Chung W Allentown, PA 8 208

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