Delay circuit with phase locked loop control
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United States of America Patent
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-
Apr 14, 1992
Grant Date -
N/A
app pub date -
Nov 14, 1990
filing date -
Nov 14, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A delay circuit includes an output voltage controllable BICMOS delay element that is coupled to a phase locked loop that develops a control voltage. The control voltage is applied to the output BICMOS delay element and to another BICMOS delay element in the phase locked loop. An input voltage is applied to the phase locked loop and, along with the output of the phase locked loop, to the output BICMOS delay element.
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