Non-volatile counter employing memory cell groups and fault detection logic

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United States of America Patent

PATENT NO 5105449
SERIAL NO

07554045

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Abstract

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A counter includes an array of memory cells arranged in groups of memory cells, each group designating a counting decade, wherein each group of memory cells includes first and second word strings, each capable of storing a data word, and a fault flag, capable of indicating which word string contains the data word; sensing means coupled to the memory array for checking the status of the memory cells and for generating fault signals upon detection of a fault in a memory cell; logic means coupled to the memory cells and to the sensing means for selecting the first or second word string in response to a fault signal; wherein upon detection of a fault in a first word string, the data word is written into the second word string; and a central shifting unit coupled to the memory array for reading a data word stored in a word string into the shifting unit, incrementing the data word, and writing the incremented data word into its respective word string.

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Patent Owner(s)

Patent OwnerAddress
HUGHES MICROELECTRONICS LIMITED QUEENSWAY INDUSTRIAL ESTATE GLENROTHES FIFE SCOTLAND A COMPANY ORGANIZED UNDER THE LAW OF UNITED KINGDOM OF GREAT BRITAINNot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bennett, Daniel H Guildford, GB 3 9
Dodd, Gary L East Molesey, GB 2 4
Murray, Kenelm G D Chiddingfold, GB 9 198

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