Apparatus for minimizing the reverse bias breakdown of emitter base junction of an output transistor in a tristate bicmos driver circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5107142
SERIAL NO

07605566

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A tristate driver circuit including a first output transistor for furnishing a first output voltage at an output terminal in the on condition, the first transistor being susceptible to disablement or degraded operation from back biasing in the presence of voltages above a particular level at the output terminal in the off condition, a second output transistor for furnishing a second output voltage at the output terminal in the on condition, apparatus for biasing the first and second transistors to allow operation thereof in the presence of enable signals and to disable operation in the absence of enable signals, and apparatus for eliminating back biasing of the first transistor in the absence of enable signals.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
SUN MICROSYSTEMS INC4150 NETWORK CIRCLE SANTA CLARA CA 95054

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bhamidipaty, Achyutram Milpitas, CA 4 93

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation