DRAM memory cell and method of operation thereof for transferring increased amount of charge to a bit line
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United States of America Patent
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Apr 28, 1992
Issued Date -
N/A
app pub date -
Mar 9, 1990
filing date -
Apr 22, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An improved DRAM memory cell uses ferroelectric material as the dielectric between capacitor plates. Preferably polycrystalline PZT or a perovskite is used for the ferroelectric, and the polar axes of the dipoles in the ferroelectric material in relaxed position are not aligned with the direction of the resulting electric field when voltage is applied to the capacitor plates. Preferably, the dipole orientation is in the plane of the ferroelectric film so that when a write voltage is removed from the capacitor plate, the dipoles tend to relax to a non-aligned position. When the cell is read or refreshed, increased charge is drawn from the bit line and resides on the capacitor plate in order to reorient the relaxed dipoles. The charge developed on the plate hence is magnified.
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