Nonvolatile content-addressable memory and operating method therefor

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United States of America Patent

PATENT NO 5111427
SERIAL NO

07310115

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Abstract

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Each of memory cells in a nonvolatile content-addressable memory (CAM) comprises a first memory transistor connected to a first storage node, a second memory transistor connected to a second storage node, and a memory capacitor connected between said first and second storage nodes. The first storage node is connected to a first bit line through an MOS transistor, and the second storage node is connected to a second bit line through the MOS transistor. In addition, each of the memory cells has a function of determining whether or not information applied to the first and second bit lines and information applied to the first and second storage nodes match with each other. In the nonvolatile CAM, writing and reading by a DRAM operation become possible by using the memory capacitor in each of the memory cells. In addition, in the nonvolatile CAM, nonvolatile writing and reading by an EEPROM operation become possible by using the first and second memory transistors in each of the memory cells. Furthermore, information stored in the memory capacitor or the first and second memory transistors in each of the memory cells can be searched by applying search information to the corresponding first and second bit line pairs.

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Patent Owner(s)

Patent OwnerAddress
MITSUBISHI DENKI KABUSHIKI KAISHATOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kobayashi, Kazuo Hyogo, JP 333 6984
Nakayama, Takeshi Hyogo, JP 177 2668
Terada, Yasushi Hyogo, JP 37 1598

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