Deposition apparatus and method for enhancing step coverage and planarization on semiconductor wafers

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United States of America Patent

PATENT NO 5114556
SERIAL NO

07457347

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Abstract

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A layer of a substance such as a metal, non-metal or metal alloy is deposited, preferably by sputtering, onto the surface of a substrate such as a semiconductor wafer. The adatoms of the deposited layer are mobilized by being bombarded with a flux of low energy neutral atoms or molecules at an oblique angle of incidence to enhance step coverage and/or planarization of the semiconductor wafer. The neutral atoms or molecules are formed within the plasma by applying a negative bias potential to a reflector electrode which will attract positive ions from the plasma. The neutral atoms or molecules elastically scatter from the surface of the electrode to bombard the adatoms being deposited during the operation of the sputter source.

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Patent Owner(s)

Patent OwnerAddress
SOLITEC WAFER PROCESSING INC665 RIVER OAKS PARKWAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lamont, Jr Lawrence T San Jose, CA 12 834

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