Buffer for packetizing block of data with different sizes and rates received from first processor before transferring to second processor
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United States of America Patent
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May 26, 1992
Grant Date -
N/A
app pub date -
Apr 21, 1989
filing date -
Apr 21, 1989
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A bus-to-bus adapter is provided for coupling the input/output bus of a first data processor to the input/output bus of a second and different type of data processor. The adapter enables the transfer of data and messages from the first processor to the second processor and vice versa. The adapter includes a buffer storage unit and control logic for enabling multiple data buffers to be provided for enabling multiple independent data transfer operations to be performed in a concurrent manner. The control logic also includes a mechanism for allowing the reading out of data from a data buffer to begin before such data buffer has received all of its incoming data. The adapter further includes a programmable service time allocation mechanism for limiting message service time relative to data transfer service time and for providing different amounts of data transfer service time for different ones of the multiple data buffers.
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