Memory addressing system using first and second address signals and modifying second address responsive predetermined values of first address signal
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United States of America Patent
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-
May 26, 1992
Grant Date -
N/A
app pub date -
Oct 12, 1989
filing date -
Nov 3, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A computer has a pageable memory which comprises a plurality of memory units each made up of a plurality of blocks of addressable memory locations. A designated one of the blocks is required to be accessed in combination with the remainder of the blocks. Logic circuits are responsive to first and second groups of address bits to generate signals which enable a selected one of the memory units and access a selected one of the blocks on the selected unit. The designated block is accessed directly by one of the aforesaid groups of address bits.
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