Multilayer electrical interconnect fabrication with few process steps
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United States of America Patent
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Jun 2, 1992
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N/A
app pub date -
May 28, 1991
filing date -
May 28, 1991
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Abstract
Method for making a multilayer electrical interconnect with stacked pillars between layers using a minimal number of conventional process steps. The method includes sputtering a chromium/copper/titanium trilayer on a dielectric base, depositing a patterned mask on the trilayer, etching the exposed trilayer, removing the mask, depositing a layer of polyimide over the unetched copper, forming a via in the polyimide above the copper, electrolessly plating nickel into the via, and polishing the interconnect to form a planar top surface.
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