Programmable application specific integrated circuit and logic cell therefor
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United States of America Patent
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Jun 16, 1992
Grant Date -
N/A
app pub date -
Mar 6, 1991
filing date -
Mar 6, 1991
priority date (Note) -
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Abstract
A field programmable gate array includes a programmable routing network, a programmable configuration network integrated with the programmable routing network; and a logic cell integrated with the programmable configuration network. The logic cell includes four two-input AND gates, two six-input AND gates, three multiplexers, and a delay flipflop. The logic cell is a powerful general purpose universal logic building block suitable for implementing most TTL and gate array macrolibrary functions. A considerable variety of functions are realizable with one cell delay, including combinational logic functions as wide as thirteen inputs, all boolean transfer functions for up to three inputs, and sequential flipflop functions such as T, JK and count with carry-in.
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