Importance

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Abstract

An interface circuit includes a generator for driving an interface signal to a receiver which produces an output signal in response thereto. The generator (or driver) includes a pair of relatively larger complementary conductivity field effect transistors and a pair of relatively smaller complementary conductivity field effect transistors (FETs), each pair in series circuit between the supply rails. The interface signal is produced at a connection of the center points of both pairs of FETs. A control device renders like ones of the FETs in each pair alternately conductive responsive to the input signal, however, the control device generates control signals for the FETs such that the relatively smaller FET of a given conductivity becomes conductive before the larger FET of that same conductivity. The receiver includes a voltage divider to attenuating and coupling the received interface signal to a high-gain amplifier which produces the output signal. Preferably, the signals have amplitudes sufficiently large to cause the interface circuit to operate as a digital interface. Further, it is preferred that two generators of opposite signal sense be employed to produce a differential interface signal, in which case the receiver includes a differential amplifier having opposite signal sense inputs to which the differential signals are applied through a differential voltage divider. In the preferred differential amplifier, opposite signal sense outputs are fed back in the regenerative sense to the two inputs to introduce hysteresis.

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First Claim