Method of manufacturing edge connected semiconductor die
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jun 30, 1992
Grant Date -
N/A
app pub date -
Oct 5, 1990
filing date -
Oct 5, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Die bond locations on a semiconductor die are formed as vertical inserts along the edge of the die. The vertical inserts are isolated from substrate and are exposed by a wafer saw process, in which dice are singulated from a wafer. The configuration offers the advantages of a more efficient layout, allowing the entire top surface of the die to be passivated, a better contact configuration, and more convenient assembly for packaging.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully