US Patent No: 5,126,966

Number of patents in Portfolio can not be more than 2000

High speed logic simulation system with stimulus engine using independent event channels selectively driven by independent stimulus programs

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Abstract

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A stimulus engine for a logic simulation system is used to interpret a stimulus language and generate test patterns as input to a logic simulator. The stimulus language allows a large test pattern set to be represented as a program. Special purpose hardware interprets this program and generates a sequence of input/output events to the logic simulator. The program interpretation is performed while the logic simulation is executing. Special purpose hardware is used to insure that the stimulus engine is able to generate the input/output events at a rate which does not slow down the logic simulator.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
MENTOR GRAPHICS CORPORATIONWILSONVILLE, OR907

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fazakerly, William Saratoga, CA 3 144
Hafeman, Dan R Sunnyvale, CA 3 144
Loesch, William Hillsborough, CA 4 73

Cited Art Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (3)
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4,656,580 Logic simulation machine 112 1982
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MENTOR GRAPHICS CORPORATION (3)
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NEC CORPORATION (3)
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Cirrus Computers Ltd. (1)
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DAISY/CADNETIX INC., A CORP. OF COLORADO (1)
4,751,637 Digital computer for implementing event driven simulation algorithm 27 1984
 
DATA I/O CORPORATION (1)
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ETA Systems, Inc. (1)
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Grumman Aerospace Corporation (1)
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HITACHI, LTD. (1)
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International Computers Limited (1)
4,644,487 Method and apparatus for verifying the design of digital electronic components 32 1984
 
INVESTMENT PARTNERS OF AMERICA, L.P. (1)
4,656,632 System for automatic testing of circuits and systems 63 1983
 
MOTOROLA, INC. (1)
4,821,173 Wired "OR" bus evaluator for logic simulation 14 1988
 
NCR CORPORATION (1)
4,628,471 Digital system simulation method and apparatus having two signal-level modes of operation 15 1984
 
Rank Xerox SA (1)
4,622,647 System for the automatic testing of printed circuits 45 1983
 
SCHLUMBERGER SYSTEMS AND SERVICES, INC. (1)
4,763,288 System for simulating electronic digital circuits 37 1985
 
SHARP KABUSHIKI KAISHA (1)
4,775,950 Logic simulation system 49 1985

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
CADENCE DESIGN SYSTEMS, INC. (23)
5,680,583 Method and apparatus for a trace buffer in an emulation system 77 1994
5,661,662 Structures and methods for adding stimulus and response functions to a circuit design undergoing emulation 67 1995
5,657,241 Routing methods for use in a logic emulation system 38 1995
5,612,891 Hardware logic emulation system with memory capability 62 1995
5,819,065 System and method for emulating memory 63 1996
5,822,564 Checkpointing in an emulation system 26 1996
5,841,967 Method and apparatus for design verification using emulation and simulation 75 1996
5,920,712 Emulation system having multiple emulator clock cycles per emulated clock cycle 53 1996
5,884,066 Method and apparatus for a trace buffer in an emulation system 18 1997
5,960,191 Emulation system with time-multiplexed interconnect 81 1997
5,970,240 Method and apparatus for configurable memory emulation 51 1997
6,421,251 Array board interconnect system and method 31 1998
6,134,516 Simulation server system and method 97 1998
6,026,230 Memory simulation system and method 77 1998
6,389,379 Converification system and method 140 1998
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6,377,912 Emulation system with time-multiplexed interconnect 70 1999
7,738,398 System and method for configuring communication systems 1 2004
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7,555,424 Method and apparatus for rewinding emulated memory circuits 1 2006
 
SYNOPSYS, INC. (9)
5,625,580 Hardware modeling system and method of use 44 1994
5,691,911 Method for pre-processing a hardware independent description of a logic circuit 7 1995
5,680,318 Synthesizer for generating a logic network using a hardware independent description 3 1995
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5,530,841 Method for converting a hardware independent user description of a logic circuit into hardware components 25 1995
5,748,488 Method for generating a logic circuit from a hardware independent user description using assignment conditions 10 1995
5,737,574 Method for generating a logic circuit from a hardware independent user description using mux conditions and hardware selectors 1 1995
6,058,252 System and method for generating effective layout constraints for a circuit design or the like 43 1997
6,148,275 System for and method of connecting a hardware modeling element to a hardware modeling system 1 1997
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (2)
5,649,164 Sets and holds in virtual time logic simulation for parallel processors 28 1994
6,975,965 System and method for heuristically optimizing a large set of automated test sets 2 2004
 
MICROSOFT CORPORATION (2)
6,449,659 System for instance customization with application independent programming of controls 28 1997
6,718,534 System for application independent programming of controls 7 2000
 
QUICKTURN DESIGN SYSTEMS, INC. (2)
5,812,414 Method for performing simulation using a hardware logic emulation system 44 1996
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Versity Design, Inc. (2)
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ADAPTEC, INC. (1)
5,920,490 Integrated circuit test stimulus verification and vector extraction system 38 1996
 
ALTERA CORPORATION (1)
8,000,954 FPGA emulation system 0 2006
 
ARKOS, INC. (1)
5,923,865 Emulation system having multiple emulated clock cycles per emulator clock cycle and improved signal routing 11 1995
 
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. (1)
6,421,823 Bidirectional socket stimulus interface for a logic simulator 6 1995
 
COMPAQ INFORMATION TECHNOLOGIES GROUP, L.P. (1)
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HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (1)
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NEC CORPORATION (1)
5,465,383 System for forming test patterns for large scale integrated circuits 3 1995
 
SUN MICROSYSTEMS, INC. (1)
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TEXAS INSTRUMENTS INCORPORATED (1)
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