Integrated cache SRAM memory having synchronous write and burst read

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United States of America Patent

PATENT NO 5126975
SERIAL NO

07602507

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Abstract

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An integrated cache memory device using SRAM cells is disclosed. The integrated cache memory has synchronized write capability and burst read capability.

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Patent Owner(s)

Patent OwnerAddress
INTEGRATED DEVICE TECHNOLOGY INC A CORP OF DE3236 SCOTT BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Handy, James E San Jose, CA 5 686
Maas, Kelly A San Jose, CA 2 186

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