Method for automatic semiconductor wafer inspection

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5129009
SERIAL NO

07533207

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An automatic integrated circuit inspection method is provided wherein an image of an integrated circuit is obtained and a direction edge enhancement is performed. An image of an integrated circuit under inspection is then obtained and the direction edge enhancement performed. The second edge enhanced image is then logically compared to the first edge enhanced image. Preferably, the first edge enhanced image is dilated while the second edge enhanced image is skeletonized to improve robustness of the system allowing for magnification and rotation errors in either the sample image or the image under inspection. Further, defects which are located are then classified by obtaining a plurality of images of the defect while changing light conditions. The plurality of defect images are combined to form a feature matrix which is then compared against an expert system database having a large number of feature matrices associated with defect classifications.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
FREESCALE SEMICONDUCTOR INC6501 WILLIAM CANNON DRIVE WEST AUSTIN TX 78735

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lebeau, Christopher J Tempe, AZ 13 336

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation