Method and apparatus for executing an operation request signal in a loosely coupled parallel computer having processor elements capable of updating memory contents and minimizing exclusive control of sharable distributed memories

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United States of America Patent

PATENT NO 5129093
SERIAL NO

07272550

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Abstract

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A parallel computer has an operation request function and a plurality of processor elements. Each processor element has a sharable distributed memory for holding data, and is interconnected to a network to permit communication. Each processor element comprises a request sent unit for sending an operation request message for causing another processor element connected to a memory module to execute a recursive defining operation. The memory module stores data to be recursively defined. Each processor element further comprises an operation request execution element for accepting a message from another processor, temporarily stopping any other operation of the processor element in accordance with the content of the message, and executing the requested operation. Registers are also used for executing the operation requested by the other processor in addition to the general purpose registers and floating point registers.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTD A CORP OF JAPAN6 KANDA SURUGADAI 4-CHOME CHIYODA-KU TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Muramatsu, Akira Kawasaki, JP 88 1197
Nakao, Kazuo Sagamihara, JP 11 321
Yoshihara, Ikuo Tama, JP 45 513

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