Large fault tolerant packet switch particularly suited for asynchronous transfer mode (ATM) communication
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United States of America Patent
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Jul 14, 1992
Grant Date -
N/A
app pub date -
Dec 18, 1990
filing date -
Dec 18, 1990
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Apparatus, and accompanying methods for use therein, for a large (e.g. approximately 1 Terabit/second), fault tolerant packet switch (200), particularly suited for asynchronous mode transfer (ATM) communication, which utilizes cell address look-ahead in conjunction with parallel planes of self-routing cross-points (550), staggered time phased contention resolution and shared memory based input and output modules (260 and 270, respectively). An ATM cell applied to an input port of an interface module contains a data field and a virtual channel identifier (VCI) field. The VCI is translated by the interface module into a new VCI, to identify an output of the virtual channel for the switch and appends to the cell an additional routing header which will be used strictly for internal use in routing the entire cell through the switch and which includes distinct first and second portions.
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