LSI gate array having reduced switching noise
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United States of America Patent
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-
Jul 21, 1992
Issued Date -
N/A
app pub date -
Aug 14, 1991
filing date -
Dec 23, 1983
priority date (Note) -
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status (Latency Note)
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Abstract
As the number of output circuits in LSI or VLSI circuits increases, the chance of many large output circuits operating as a same instant increases, which can cause a malfunction in the logic due to induced switching noise. In order to prevent such a problem, the switching speed of the driving buffer circuit for an output buffer circuit is controlled. By reducing the switching capacity of the driving circuit, the switching speed of the total circuit is not greatly affected and the noise is greatly decreased. Control of the switching capacity of the driving buffer circuit is performed by master slice technology. This opposite design concept, compared to that of prior art LSI design, has been proved by experiments.
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