Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices

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United States of America Patent

PATENT NO 5133064
SERIAL NO

07184782

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Abstract

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An information processing system having an original clock oscillator for delivering at least one original clock signal K defined as a first clock signal and a plurality of information processing units supplied with the original clock signal K, wherein each information processing unit comprises clock generating means for generating at least one second clock signal K.sub.1 which is phase-locked with the original clock signal K and which has a predetermined duty cycle and a logic device whose operation timing is controlled by the second clock signal K.sub.1, and the operation timing of an interface provided between at least one pair of logic devices is synchronously controlled by the clock signal K.sub.1.

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Patent Owner(s)

  • HITACHI, LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bandoh, Tadaaki Tohkai, JP 39 1366
Hotta, Takashi Hitachi, JP 87 1277
Iwamura, Masahiro Hitachi, JP 95 1654
Kato, Kazuo Tohkai, JP 221 2440
Kurita, Kozaburo Hitachi, JP 33 602
Maejima, Hideo Hitachi, JP 73 1762
Nakatsuka, Yasuhiro Hitachi, JP 67 1461
Sinoda, Sin-ichi Hitachi, JP 8 254
Tanaka, Shigeya Hitachi, JP 45 1012

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