Rush current prevention circuit

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United States of America Patent

PATENT NO 5140183
SERIAL NO

07578223

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Abstract

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A second circuit to which back-up power is supplied, such as a RAM, is connected downstream of a first circuit to which no back-up power is supplied, such as a CPU. A gate circuit inhibits the output signal of the first circuit to the second circuit and provides a predetermined level to the second circuit when the output signal of the first circuit is at an indefinite level and prevents a penetration current from flowing through the second circuit.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA A CORP OF JAPAN72 HORIKAWA-CHO SAIWAI-KU KAWASAKI-SHI

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Takenaka, Tsutomu Tokyo, JP 23 277

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