Importance

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Abstract

A locking circuit for controlling access to locked segments of a shared memory includes a content-addressable memory for storing addresses of the locked memory segments and for simultaneously comparing a target address with the addresses of the locked memory segments and providing a match signal when the target address matches one of the addresses of the locked memory segments. During a memory access cycle, a target address is supplied to the content-addressable memory, and a control circuit is responsive to the match signal to inhibit completion of the memory access cycle. A locking ID, which identifies the processor or process that locked the memory segment, is stored in a second memory. During a memory access cycle, a requesting ID is compared with the locking ID of the locked segment which produced the match signal. When the locking ID and the requesting ID match, the memory access cycle is enabled. Additional verification fields, such as security keys and access codes, can be used to control access to the shared memory.

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First Claim