Importance

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Abstract

A tri-state pin driver is formed in part, along with a pin sensor, on an integrated circuit. A pin driver and sensor are coupled to a common pin of a device under test. In normal mode, the pin driver drives a test signal. In high impedance mode, the pin driver is at a high impedance, enabling a sensor to monitor a response signal. The pin driver includes a driver stage formed off-chip by a pair of power transistors operated in the active region. The large power transistors enable a large current (i.e., +/-500 mA) to be sourced or sunk so as to drive a device under test and back-drive preceding circuits. Operating in the active region enables faster logic state transition times, and thus, a fast test rate, while reducing undesirable signal distortion. A predriver stage is configured as a unity-gain emitter follower. The predriver stage includes first and second signal paths. Each signal path includes a pair of transistors configured, during normal mode, as a transmission gate. When the pin driver output is high impedance, the transistor pairs instead form open circuits in which respective collector-emitter junctions provide breakdown voltage protection. The pin driver also includes a waveform generator which receives a test state signal for defining the pin driver output logic level, and an analog slew rate control signal for defining the pin driver slew rate. Off-chip diodes are used to set the output levels of the waveform generator and to provide reverse breakdown voltage protection at the high reference voltage and low reference voltage terminals.

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