Semiconductor package utilizing edge connected semiconductor dice
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United States of America Patent
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Sep 8, 1992
Grant Date -
N/A
app pub date -
Oct 5, 1990
filing date -
Oct 5, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Die bond locations on a semiconductor die are formed as vertical inserts along the edge of the die. The vertical inserts are isolated from substrate and are exposed by a wafer saw process, in which dice are singulated from a wafer. The configuration offers the advantages of a more efficient layout, allowing the entire top surface of the die to be passivated, a better contact configuration, and more convenient assembly for packaging.
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