MOS folded source-coupled logic
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Sep 22, 1992
Grant Date -
N/A
app pub date -
Apr 30, 1991
filing date -
Apr 30, 1991
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
In integrated circuitry having both analog and digital circuits fabricated on the same substrate, switching transients produced by the digital circuitry can propagate through the substrate and induce deleterious effects in the associated analog circuitry. Such switching transients are greatly minimized by a CMOS source-coupled current-steering differential logic topology. In the preferred embodiment, gain and level shifting functions are merged, and connections to the power bus are made through constant current sources.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully