Circuit suitable for differential multiplexers and logic gates utilizing bipolar and field-effect transistors
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United States of America Patent
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Oct 13, 1992
Issued Date -
N/A
app pub date -
Jul 8, 1991
filing date -
Dec 28, 1989
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A circuit employable as a differential multiplexer (10, 310, or 610) or as a differential logic gate (110, 210, 250, 410, or 510) of either the OR/NOR or EXCLUSIVE OR/EXCLUSIVE NOR type contains four pass gates that operate on four circuit input signals and are controlled by two additional circuit input signals. Two of the pass gates drive a bipolar transistor serially coupled to a first FET driven from the other two pass gates. Likewise, the second pair of pass gates drive another bipolar transistor serially coupled to another FET driven from the first pair of pass gates. The bipolar transistors supply respective circuit output signals. The two FETs are of a first polarity. The circuit preferably includes a pair of FETs of a second polarity opposite to the first polarity. The second pair of FETs are arranged so as to provide output pull-up/pull-down assistance for the bipolar transistors.
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