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Abstract

A C-MOS sense amplifier capable of detecting voltage differences between the signals applied to its inputs in correspondence with the clock signal transitions. The amplifier has a level converter, a sense circuit and a feedback block which are inactive in a first inactive phase of the clock signal, while in a second active phase, immediately after clock signal transition, the sense amplifier attains the operating point necessary to activate the level converter and the sense circuit. Hence a high positive feedback is started which switches the sense circuit. Finally, after the level transition of a delayed clock signal, the feedback signal generated by the feedback block reduces to zero the dissipation of the whole differential sense amplifier.

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First Claim