Data processing system capable of performing a direct memory access transfer of data stored in a physical area in a memory

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5155830
SERIAL NO

07355605

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A system is constituted by a DMAC, a CPU, a main memory, and an I/O device. The DMAC has a FIFO type BDW buffer for storing a buffer descriptor word (BDW) and a control unit. The control unit loads a BDW from the BDW buffer, and controls DMA. The CPU writes a new BDW in the BDW buffer during a DMA operation execution period.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA A CORP OF JAPAN72 HORIKAWA-CHO SAIWAI-KU KAWASAKI-SHI

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kurashige, Takehiko Tokyo, JP 45 567

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation